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? 2012 microchip technology inc. ds25138b-page 1 mcp6h91/2/4 features: ? input offset voltage: 1 mv (typical) ? quiescent current: 2ma (typical) ? common mode rejection ratio: 98 db (typical) ? power supply rejection ratio: 94 db (typical) ? rail-to-rail output ? supply voltage range: - single-supply operation: 3.5v to 12v - dual-supply operation: 1.75v to 6v ? gain bandwidth product: 10 mhz (typical) ? slew rate: 10 v/s (typical) ? unity gain stable ? extended temperature range: -40c to +125c ? no phase reversal applications: ? automotive power electronics ? industrial control equipment ? battery powered systems ? medical diagnostic instruments design aids: ? spice macro models ?filterlab ? software ? maps (microchip advanced part selector) ? analog demonstration and evaluation boards ? application notes typical application description: microchip?s mcp6h91/2/4 family of operational amplifiers (op amps) has a wide supply voltage range of 3.5v to 12v and rail-to-rail output operation. this family is unity gain stable and has a gain bandwidth product of 10 mhz (typical). these devices operate with a single-supply voltage as high as 12v, while only drawing 2 ma/amplifier (typical) of quiescent current. the mcp6h91/2/4 family is offered in single (mcp6h91), dual (mcp6h92) and quad (mcp6h94) configurations. all devices are fully specified in extended temperature range from -40c to +125c. package types difference amplifier r 1 v out r 2 r 1 v ref r 2 v dd v 1 v 2 mcp6h91 * includes exposed thermal pad (ep); see ta b le 3 -1 . 1 2 3 4 8 7 6 5 ep 9 v dd v out nc nc v in + v in ? v ss nc 1 2 3 4 8 7 6 5 ep 9 v outb v inb ? v inb + v dd v ina + v ina ? v ss v outa v ina + v ina ? v ss 1 2 3 4 8 7 6 5 v outa v dd v outb v inb ? v inb + v in + v in ? v ss 1 2 3 4 8 7 6 5 nc nc v dd v out nc mcp6h91 soic mcp6h92 soic mcp6h91 2x3 tdfn mcp6h92 2x3 tdfn mcp6h94 soic, tssop v ina + v ina ? v dd 1 2 3 4 14 13 12 11 v outa v outd v ind ? v ind + v ss v inb + 5 10 v inc + v inb ? 6 9 v outb 7 8 v outc v inc ? 10 mhz, 12v op amps
mcp6h91/2/4 ds25138b-page 2 ? 2012 microchip technology inc. notes:
? 2012 microchip technology inc. ds25138b-page 3 mcp6h91/2/4 1.0 electrical characteristics 1.1 absolute maximum ratings ? v dd ? v ss .......................................................................13.2v current at input pins......................................................2 ma analog inputs (v in +, v in -)??.............v ss ? 1.0v to v dd +1.0v all other inputs and outputs ............v ss ? 0.3v to v dd +0.3v difference input voltage..........................................v dd ? v ss output short-circuit current...................................continuous current at output and supply pins ..............................65 ma storage temperature.....................................-65c to +150c maximum junction temperature (t j )...........................+150c esd protection on all pins (hbm; mm) ???????????????????? 2 kv; 200v ? notice: stresses above those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. ?? see section 4.1.2, input voltage limits . dc electrical specifications electrical characteristics : unless otherwise indicated, v dd = +3.5v to +12v, v ss = gnd, t a = +25c, v cm =v dd /2 - 1.4v, v out ? v dd /2, v l =v dd /2 and r l =10k ?? to v l . (refer to figure 1-1 ). parameters sym. min. typ. max. units conditions input offset input offset voltage v os -4 1 +4 mv input offset drift with temperature ? v os / ? t a ?2.5?v/ct a = -40c to +125c power supply rejection ratio psrr 75 94 ? db input bias current and impedance input bias current i b ?10?pa ?400?pat a =+85c ?925nat a =+125c input offset current i os ?1?pa common mode input impedance z cm ?10 13 ||6 ? ? ||pf differential input impedance z diff ?10 13 ||6 ? ? ||pf common mode common mode input voltage range v cmr v ss ? 0.3 ? v dd ? 2.5 v common mode rejection ratio cmrr 75 91 ? db v cm = -0.3v to 1.0v, v dd =3.5v 80 97 ? db v cm = -0.3v to 2.5v, v dd =5v 80 98 ? db v cm = -0.3v to 9.5v, v dd =12v open-loop gain dc open-loop gain (large signal) a ol 95 115 ? db 0.2v < v out <(v dd ? 0.2v)
mcp6h91/2/4 ds25138b-page 4 ? 2012 microchip technology inc. output high-level output voltage v oh 3.490 3.495 ? v v dd =3.5v 0.5v input overdrive 4.985 4.993 ? v v dd =5v 0.5v input overdrive 11.970 11.980 ? v v dd =12v 0.5v input overdrive low-level output voltage v ol ? 0.005 0.010 v v dd =3.5v 0.5 v input overdrive ? 0.007 0.015 v v dd =5v 0.5 v input overdrive ? 0.020 0.030 v v dd =12v 0.5 v input overdrive output short-circuit current i sc ?35?mav dd =3.5v ?41?mav dd =5v ?41?mav dd =12v power supply supply voltage v dd 3.5 ? 12 v single-supply operation 1.75 ? 6 v dual-supply operation quiescent current per amplifier i q ?22.8mai o =0, v cm =v dd /4 ac electrical specifications electrical characteristics: unless otherwise indicated, t a = +25c, v dd = +3.5v to +12v, v ss = gnd, v cm =v dd /2 - 1.4v, v out ? v dd /2, v l =v dd /2, r l =10k ?? to v l and c l = 60 pf. (refer to figure 1-1 ). parameters sym. min. typ. max. units conditions ac response gain bandwidth product gbwp ? 10 ? mhz phase margin pm ? 60 ? c g = +1v/v slew rate sr ? 10 ? v/s noise input noise voltage e ni ? 10 ? vp-p f = 0.1 hz to 10 hz input noise voltage density e ni ?23?nv/ ? hz f = 1 khz ?12?nv/ ? hz f = 10 khz input noise current density i ni ?1.9?fa/ ? hz f = 1 khz dc electrical specifications (continued) electrical characteristics : unless otherwise indicated, v dd = +3.5v to +12v, v ss = gnd, t a = +25c, v cm =v dd /2 - 1.4v, v out ? v dd /2, v l =v dd /2 and r l =10k ?? to v l . (refer to figure 1-1 ). parameters sym. min. typ. max. units conditions
? 2012 microchip technology inc. ds25138b-page 5 mcp6h91/2/4 1.2 test circuits the circuit used for most dc and ac tests is shown in figure 1-1 . this circuit can independently set v cm and v out (refer to equation 1-1 ). note that v cm is not the circuit?s common mode voltage ((v p +v m )/2), and that v ost includes v os plus the effects (on the input offset error, v ost ) of temperature, cmrr, psrr and a ol . equation 1-1: figure 1-1: ac and dc test circuit for most specifications. temperature specifications electrical characteristics: unless otherwise indicated, v dd = +3.5v to +12v and v ss = gnd. parameters sym. min. typ. max. units conditions temperature ranges operating temperature range t a -40 ? +125 c note 1 storage temperature range t a -65 ? +150 c thermal package resistances thermal resistance, 8l-2x3 tdfn ? ja ?52.5?c/w thermal resistance, 8l-soic ? ja ?149.5?c/w thermal resistance, 14l-soic ? ja ?95.3?c/w thermal resistance, 14l-tssop ? ja ? 100 ? c/w note 1: the internal junction temperature (t j ) must not exceed the absolute maximum specification of +150c. g dm r f r g ? = v cm v p v dd 2 ? + ?? 2 ? = v out v dd 2 ? ?? v p v m ? ?? v ost 1g dm + ?? ? ++ = where: g dm = differential mode gain (v/v) v cm = op amp?s common mode input voltage (v) v ost = op amp?s total input offset voltage (mv) v ost v in ? v in + ? = v dd r g r f v out v m c b2 c l r l v l c b1 100 k ? 100 k ? r g r f v dd /2 v p 100 k ? 100 k ? 60 pf 10 k ? 1f 100 nf v in? v in+ c f 6.8 pf c f 6.8 pf mcp6h9x
mcp6h91/2/4 ds25138b-page 6 ? 2012 microchip technology inc. notes:
? 2012 microchip technology inc. ds25138b-page 7 mcp6h91/2/4 2.0 typical performance curves note: unless otherwise indicated, t a =+25c, v dd = +3.5v to +12v, v ss = gnd, v cm =v dd /2 - 1.4v, v out ? v dd /2, v l =v dd /2, r l =10k ?? to v l and c l =60pf. figure 2-1: input offset voltage. figure 2-2: input offset voltage drift. figure 2-3: input offset voltage vs. common mode input voltage. figure 2-4: input offset voltage vs. common mode input voltage. figure 2-5: input offset voltage vs. common mode input voltage. figure 2-6: input offset voltage vs. output voltage. note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 0% 2% 4% 6% 8% 10% 12% 14% -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0 percentage of occurences input offset voltage (mv) 2856 samples 0% 5% 10% 15% 20% 25% -24 -21 -18 -15 -12 -9 -6 -3 0 3 6 9 12 15 18 21 24 percentage of occurences input offset voltage drift (v/ c) 1630 samples t a = - 40 c to +125 c -1000 -800 -600 -400 -200 0 200 400 600 800 1000 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 input offset voltage (v) common mode input voltage (v) t a = +125c t a = +85c t a = +25c t a = -40c v dd = 3.5v representative part -1000 -800 -600 -400 -200 0 200 400 600 800 1000 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 input offset voltage (v) common mode input voltage (v) t a = +125c t a = +85c t a = +25c t a = -40c v dd = 5v representative part -1000 -800 -600 -400 -200 0 200 400 600 800 1000 -0.5 1.5 3.5 5.5 7.5 9.5 11.5 input offset voltage (v) common mode input voltage (v) t a = +125c t a = +85c t a = +25c t a = -40c v dd = 12v representative part -1000 -800 -600 -400 -200 0 200 400 600 800 1000 024681012 14 input offset voltage (v) output voltage (v) v dd = 12v v dd = 5v v dd = 3.5v representative part
mcp6h91/2/4 ds25138b-page 8 ? 2012 microchip technology inc. note: unless otherwise indicated, t a =+25c, v dd = +3.5v to +12v, v ss = gnd, v cm =v dd /2 - 1.4v, v out ? v dd /2, v l =v dd /2, r l =10k ?? to v l and c l =60pf. figure 2-7: input offset voltage vs. power supply voltage. figure 2-8: input noise voltage density vs. frequency. figure 2-9: input noise voltage density vs. common mode input voltage. figure 2-10: cmrr, psrr vs. frequency. figure 2-11: cmrr, psrr vs. ambient temperature. figure 2-12: input bias, offset currents vs. ambient temperature. -1000 -900 -800 -700 -600 -500 -400 -300 -200 -100 0 01234567891011 12 input offset voltage (v) power supply voltage (v) t a = +125c t a = +85c t a = +25c t a = -40c representative part 1 10 100 1,000 input noise voltage density (nv/hz) frequency (hz) 1 10 100 1k 10k 100k 1m 0 2 4 6 8 10 12 14 16 18 20 -113579 11 input noise voltage density (nv/hz) common mode input voltage (v) f = 10 khz v dd = 12 v 20 30 40 50 60 70 80 90 100 110 10 100 1000 10000 100000 1000000 cmrr, psrr (db) frequency (hz) 10 100 1k 10k 100k 1m cmrr psrr+ psrr- representative part 40 50 60 70 80 90 100 110 120 130 -50 -25 0 25 50 75 100 125 cmrr, psrr (db) ambient temperature (c) psrr cmrr @ v dd = 12v @ v dd = 5v @ v dd = 3.5v 0.1 1 10 100 1000 10000 25 35 45 55 65 75 85 95 105 115 125 input bias and offset currents (a) ambient temperature (c) input bias current input offset current v dd = 12 v 10n 1n 100p 10p 1p 0.1p
? 2012 microchip technology inc. ds25138b-page 9 mcp6h91/2/4 note: unless otherwise indicated, t a =+25c, v dd = +3.5v to +12v, v ss = gnd, v cm =v dd /2 - 1.4v, v out ? v dd /2, v l =v dd /2, r l =10k ?? to v l and c l =60pf. figure 2-13: input bias current vs. common mode input voltage. figure 2-14: quiescent current vs. ambient temperature. figure 2-15: quiescent current vs. power supply voltage. figure 2-16: open-loop gain, phase vs. frequency. figure 2-17: dc open-loop gain vs. power supply voltage. figure 2-18: dc open-loop gain vs. output voltage headroom. 1 10 100 1000 10000 100000 0246810 12 input bias current (a) common mode input voltage (v) t a = +125c t a = +85c v dd = 12 v 100n 10n 1n 100p 10p 1p 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 -50 -25 0 25 50 75 100 125 quiescent current (ma/amplifier) ambient temperature (c) v dd = 12v v dd = 5v v dd = 3.5v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0246810 12 quiescent current (ma/amplifier) power supply voltage (v) t a = +125c t a = +85c t a = +25c t a = -40c - 210 - 180 - 150 - 120 -90 -60 -30 0 -20 0 20 40 60 80 100 120 1.0e+00 1.0e+01 1.0e+02 1.0e+03 1.0e+04 1.0e+05 1.0e+06 1.0e+07 1.0e+08 open loop phase () open loop gain (db) frequency (hz) open-loop gain open-loop phase 1 10 100 1k 10k 100k 1m 10m 100m 80 100 120 140 160 180 357911 13 dc open-loop gain (db) power supply voltage (v) v ss + 0.2v < v out < v dd - 0.2v 40 60 80 100 120 140 160 0.00 0.05 0.10 0.15 0.20 0.25 0.30 dc open-loop gain (db) output voltage headroom (v) v dd -v oh or v ol -v ss v dd = 12v v dd = 5v v dd = 3.5v
mcp6h91/2/4 ds25138b-page 10 ? 2012 microchip technology inc. note: unless otherwise indicated, t a =+25c, v dd = +3.5v to +12v, v ss = gnd, v cm =v dd /2 - 1.4v, v out ? v dd /2, v l =v dd /2, r l =10k ?? to v l and c l =60pf. figure 2-19: channel-to-channel separation vs. frequency (mcp6h92 only). figure 2-20: gain bandwidth product, phase margin vs. ambient temperature. figure 2-21: gain bandwidth product, phase margin vs. ambient temperature. figure 2-22: output short circuit current vs. power supply voltage. figure 2-23: output voltage swing vs. frequency. figure 2-24: output voltage headroom vs. output current. 70 80 90 100 110 120 130 channel to channel separation (db) frequency (hz) 100 1k 10k 100k 1m input referred 0 20 40 60 80 100 120 140 160 180 0 2 4 6 8 10 12 14 -50 -25 0 25 50 75 100 125 gain bandwidth product (mhz) ambient temperature (c) gain bandwidth product phase margin v dd = 3.5v gain bandwidth product phase margin v dd = 3.5v 0 20 40 60 80 100 120 140 160 180 0 2 4 6 8 10 12 14 16 18 -50 -25 0 25 50 75 100 125 gain bandwidth product (mhz) ambient temperature (c) gain bandwidth product phase margin v dd = 12v 0 10 20 30 40 50 60 70 01234567891011 12 output short circuit current (ma) power supply voltage (v) t a = +125c t a = +85c t a = +25c t a = -40c 0.1 1 10 100 10000 100000 1000000 10000000 output voltage swing (v p -p ) frequency (hz) v dd = 3.5v v dd = 5v 10k 100k 1m 10m v dd = 12v 0.1 1 10 100 1000 0.01 0.1 1 10 100 output voltage headroom (mv) output current (ma) v dd -v oh v ss -v ol v dd = 12v
? 2012 microchip technology inc. ds25138b-page 11 mcp6h91/2/4 note: unless otherwise indicated, t a =+25c, v dd = +3.5v to +12v, v ss = gnd, v cm =v dd /2 - 1.4v, v out ? v dd /2, v l =v dd /2, r l =10k ?? to v l and c l =60pf. figure 2-25: output voltage headroom vs. output current. figure 2-26: output voltage headroom vs. output current. figure 2-27: output voltage headroom vs. ambient temperature. figure 2-28: output voltage headroom vs. ambient temperature. figure 2-29: output voltage headroom vs. ambient temperature. figure 2-30: slew rate vs. ambient temperature. 0.1 1 10 100 1000 0.01 0.1 1 10 100 output voltage headroom (mv) output current (ma) v dd -v oh v ss -v ol v dd = 5v 0.1 1 10 100 1000 0.01 0.1 1 10 output voltage headroom (mv) output current (ma) v dd -v oh v ss -v ol v dd = 3.5v 0 2 4 6 8 10 12 -50 -25 0 25 50 75 100 125 output voltage headroom (mv) ambient temperature (c) v dd -v oh v ol -v ss v dd = 12v 2 3 4 5 6 7 8 -50 -25 0 25 50 75 100 125 output voltage headroom (mv) ambient temperature (c) v dd -v oh v ol -v ss v dd = 5v 2 3 4 5 6 7 8 9 10 -50 -25 0 25 50 75 100 125 output voltage headroom (mv) ambient temperature (c) v dd -v oh v ol -v ss v dd = 3.5v 4 6 8 10 12 14 16 -50 -25 0 25 50 75 100 125 slew rate (v/s) ambient temperature (c) falling edge, v dd = 12v rising edge, v dd = 12v
mcp6h91/2/4 ds25138b-page 12 ? 2012 microchip technology inc. note: unless otherwise indicated, t a =+25c, v dd = +3.5 v to +12 v, v ss = gnd, v cm =v dd /2 - 1.4v, v out ? v dd /2, v l =v dd /2, r l =10k ?? to v l and c l =60pf. figure 2-31: slew rate vs. ambient temperature. figure 2-32: small signal non-inverting pulse response. figure 2-33: small signal inverting pulse response. figure 2-34: large signal non-inverting pulse response. figure 2-35: large signal inverting pulse response. figure 2-36: the mcp6h91/2/4 shows no phase reversal. 0 5 10 15 20 25 -50-25 0 255075100 125 slew rate (v/s) ambient temperature (c) falling edge, v dd = 5v rising edge, v dd = 5v falling edge, v dd = 3.5v rising edge, v dd = 3.5v output voltage (20 mv/div) time (0.2 s/div) v dd = 12 v g = +1 v/v output voltage (20 mv/div) time (0.2 s/div) v dd = 12 v g = -1 v/v 0 1 2 3 4 5 6 7 8 9 output voltage (v) time (1 s/div) v dd = 12 v g = +1 v/v 0 1 2 3 4 5 6 7 8 9 10 output voltage (v) time (1 s/div) v dd = 12 v g = -1 v/v -1 1 3 5 7 9 11 13 input, output voltage (v) time (0.1 ms/div) v dd = 12 v g = +2 v/v v out v in
? 2012 microchip technology inc. ds25138b-page 13 mcp6h91/2/4 note: unless otherwise indicated, t a =+25c, v dd = +3.5 v to +12 v, v ss = gnd, v cm =v dd /2 - 1.4v, v out ? v dd /2, v l =v dd /2, r l =10k ?? to v l and c l =60pf. figure 2-37: closed loop output impedance vs. frequency. figure 2-38: measured input current vs. input voltage (below v ss ). 1 10 100 1.0e+01 1.0e+02 1.0e+ 03 1.0e+04 1.0e+05 1.0e+06 closed loop output impedance ( ) frequency (hz) g n : 101 v/v 11 v/v 1 v/v 100 1k 10k 100k 1m 10m 1.00e-11 1.00e-10 1.00e-09 1.00e-08 1.00e-07 1.00e-06 1.00e-05 1.00e-04 1.00e-03 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 -i in (a) v in (v) 1m 100 10 1 100n 10n 1n 100p 10p t a = +125c t a = +85c t a = +25c t a = -40c
mcp6h91/2/4 ds25138b-page 14 ? 2012 microchip technology inc. notes:
? 2012 microchip technology inc. ds25138b-page 15 mcp6h91/2/4 3.0 pin descriptions descriptions of the pins are listed in table 3-1 . 3.1 analog outputs the output pins are low-impedance voltage sources. 3.2 analog inputs the non-inverting and inverting inputs are high-impedance cmos inputs with low bias currents. 3.3 power supply pins the positive power supply (v dd ) is 3.5v to 12v higher than the negative power supply (v ss ). for normal operation, the other pins are at voltages between v ss and v dd . typically, these parts can be used in single-supply operation or dual-supply operation. also, v dd will need bypass capacitors. 3.4 exposed thermal pad (ep) there is an internal electrical connection between the exposed thermal pad (ep) and the v ss pin; they must be connected to the same potential on the printed circuit board (pcb). this pad can be connected to a pcb ground plane to provide a larger heat sink. this improves the package thermal resistance ( ? ja ). table 3-1: pin function table mcp6h91 mcp6h92 mcp6h94 symbol description soic 2x3 tdfn soic 2x3 tdfn soic, tssop 66 1 1 1v out , v outa analog output (op amp a) 22 2 2 2v in ?, v ina ? inverting input (op amp a) 33 3 3 3v in +, v ina + non-inverting input (op amp a) 77 8 8 4 v dd positive power supply ?? 5 5 5 v inb + non-inverting input (op amp b) ?? 6 6 6 v inb ? inverting input (op amp b) ?? 7 7 7 v outb analog output (op amp b) ?? ? ? 8 v outc analog output (op amp c) ?? ? ? 9 v inc ? inverting input (op amp c) ?? ? ? 10 v inc + non-inverting input (op amp c) 44 4 4 11 v ss negative power supply ?? ? ? 12 v ind + non-inverting input (op amp d) ?? ? ? 13 v ind ? inverting input (op amp d) ?? ? ? 14 v outd analog output (op amp d) 1, 5, 8 1, 5, 8 ? ? ? nc no internal connection ? 9 ? 9 ? ep exposed thermal pad (ep); must be connected to v ss .
mcp6h91/2/4 ds25138b-page 16 ? 2012 microchip technology inc. notes:
? 2012 microchip technology inc. ds25138b-page 17 mcp6h91/2/4 4.0 application information the mcp6h91/2/4 family of op amps is manufactured using microchip?s state-of-the-art cmos process and is specifically designed for low-power, high-precision applications. 4.1 inputs 4.1.1 phase reversal the mcp6h91/2/4 op amps are designed to prevent phase reversal when the input pins exceed the supply voltages. figure 2-36 shows the input voltage exceeding the supply voltage without any phase reversal. 4.1.2 input voltage limits in order to prevent damage and/or improper operation of these amplifiers, the circuit must limit the voltages at the input pins (see section 1.1 ?absolute maximum ratings ?? ). the esd protection on the inputs can be depicted as shown in figure 4-1 . this structure was chosen to protect the input transistors against many (but not all) overvoltage conditions, and to minimize the input bias current (i b ). figure 4-1: simplified analog input esd structures. the input esd diodes clamp the inputs when they try to go more than one diode drop below v ss . they also clamp any voltages that go well above v dd . their breakdown voltage is high enough to allow normal operation, but not low enough to protect against slow overvoltage (beyond v dd ) events. very fast esd events (that meet the specification) are limited so that damage does not occur. in some applications, it may be necessary to prevent excessive voltages from reaching the op amp inputs; figure 4-2 shows one approach to protecting these inputs. figure 4-2: protecting the analog inputs. a significant amount of current can flow out of the inputs when the common mode voltage (v cm ) is below ground (v ss ), as shown in figure 2-38 . 4.1.3 input current limits in order to prevent damage and/or improper operation of these amplifiers, the circuit must limit the currents into the input pins (see section 1.1 ?absolute maximum ratings ?? ). figure 4-3 shows one approach to protecting these inputs. the resistors r 1 and r 2 limit the possible currents in or out of the input pins (and the esd diodes, d 1 and d 2 ). the diode currents will go through either v dd or v ss . figure 4-3: protecting the analog inputs. 4.1.4 normal operation the inputs of the mcp6h91/2/4 op amps connect to a differential pmos input stage. it operates at a low common mode input voltage (v cm ), including ground. with this topology, the device operates with a v cm up to v dd ? 2.5v and 0.3v below v ss (refer to figures 2-3 through 2-5 ). the input offset voltage is measured at v cm =v ss ? 0.3v and v dd ? 2.5v to ensure proper operation. for a unity gain buffer, v in must be maintained below v dd ? 2.5v for correct operation. bond pad bond pad bond pad v dd v in + v ss input stage bond pad v in ? v 1 v dd d 1 v 2 d 2 mcp6h9x v out v 1 r 1 v dd d 1 r 1 > v ss ? (minimum expected v 1 ) 2ma r 2 > v ss ? (minimum expected v 2 ) 2ma v 2 r 2 d 2 r 3 v out mcp6h9x
mcp6h91/2/4 ds25138b-page 18 ? 2012 microchip technology inc. 4.2 rail-to-rail output the output voltage range of the mcp6h91/2/4 op amps is 0.020v (typical) and 11.980v (typical) when r l =10k ? is connected to v dd /2 and v dd =12v. refer to figures 2-24 through 2-29 for more information. 4.3 capacitive loads driving large capacitive loads can cause stability problems for voltage feedback op amps. as the load capacitance increases, the feedback loop?s phase margin decreases and the closed-loop bandwidth is reduced. this produces gain peaking in the frequency response, with overshoot and ringing in the step response. while a unity-gain buffer (g = +1v/v) is the most sensitive to capacitive loads, all gains show the same general behavior. when driving large capacitive loads with these op amps (e.g., > 100 pf when g = + 1v/v), a small series resistor at the output (r iso in figure 4-4 ) improves the feedback loop?s phase margin (stability) by making the output load resistive at higher frequencies. the bandwidth will generally be lower than the bandwidth with no capacitance load. figure 4-4: output resistor, r iso stabilizes large capacitive loads. figure 4-5 gives the recommended r iso values for different capacitive loads and gains. the x-axis is the normalized load capacitance (c l /g n ), where g n is the circuit?s noise gain. for non-inverting gains, g n and the signal gain are equal. for inverting gains, g n is 1 + |signal gain| (e.g., -1v/v gives g n = +2v/v). after selecting r iso for your circuit, double check the resulting frequency response peaking and step response overshoot. modify r iso ?s value until the response is reasonable. bench evaluation and simulations with the mcp6h91/2/4 spice macro model are helpful. figure 4-5: recommended r iso values for capacitive loads. 4.4 supply bypass with this family of operational amplifiers, the power supply pin (v dd for single supply) should have a local bypass capacitor (i.e., 0.01 f to 0.1 f) within 2 mm for good high-frequency performance. it can use a bulk capacitor (i.e., 1 f or larger) within 100 mm to provide large, slow currents. this bulk capacitor can be shared with other analog parts. 4.5 unused op amps an unused op amp in a quad package (mcp6h94) should be configured as shown in figure 4-6 . these circuits prevent the output from toggling and causing crosstalk. circuit a sets the op amp at its minimum noise gain. the resistor divider produces any desired reference voltage within the output voltage range of the op amp, and the op amp buffers that reference voltage. circuit b uses the minimum number of components and operates as a comparator, but it may draw more current. figure 4-6: unused op amps. v in r iso v out c l ? + mcp6h9x 1000 so ( ) v dd = 12 v r l = 10 k 100 d ed r i 10 m men d g n : 1v/v reco m 1 v/v 2 v/v 5 v/v 1 1.e - 11 1.e - 10 1.e - 09 1.e - 08 1.e - 07 1.e - 06 10 p 100 p 1n 10n 0.1 1 1.e 11 1.e 10 1.e 09 1.e 08 1.e 07 1.e 06 normalized load capacitance; c l /g n (f) pp ? v dd v dd r 1 r 2 v dd v ref v ref v dd r 2 r 1 r 2 + -------------------- ? = ? mcp6h94 (a) ? mcp6h94 (b)
? 2012 microchip technology inc. ds25138b-page 19 mcp6h91/2/4 4.6 pcb surface leakage in applications where low input bias current is critical, pcb surface leakage effects need to be considered. surface leakage is caused by humidity, dust or other contamination on the board. under low-humidity condi- tions, a typical resistance between nearby traces is 10 12 ? . a 15v difference would cause 15 pa of current to flow; which is greater than the mcp6h91/2/4 family?s bias current at +25c (10 pa, typical). the easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). the guard ring is biased at the same voltage as the sensitive pin. an example of this type of layout is shown in figure 4-7 . figure 4-7: example guard ring layout for inverting gain. 1. non-inverting gain and unity-gain buffer: a.connect the non-inverting pin (v in +) to the input with a wire that does not touch the pcb surface. b.connect the guard ring to the inverting input pin (v in ?). this biases the guard ring to the common mode input voltage. 2. inverting gain and trans-impedance gain amplifiers (convert current to voltage, such as photo detectors): a.connect the guard ring to the non-inverting input pin (v in +). this biases the guard ring to the same reference voltage as the op amp (e.g., v dd /2 or ground). b.connect the inverting pin (v in ?) to the input with a wire that does not touch the pcb surface. 4.7 application circuits 4.7.1 difference amplifier the mcp6h91/2/4 op amps can be used in current sensing applications. figure 4-8 shows a resistor (r sen ) that converts the sensor current (i sen ) to voltage, as well as a difference amplifier that amplifies the voltage across the resistor while rejecting common mode noise. r 1 and r 2 must be well matched to obtain an acceptable common mode rejection ratio (cmrr). moreover, r sen should be much smaller than r 1 and r 2 in order to minimize the resistive loading of the source. to ensure proper operation, the op amp common mode input voltage must be kept within the allowed range. the reference voltage (v ref ) is supplied by a low-impedance source. in single-supply applications, v ref is typically v dd /2. . figure 4-8: high side current sensing using difference amplifier. guard ring v in ?v in + v ss r 1 v out r 2 r 1 r sen i sen r sen << r 1 , r 2 v out v 1 v 2 ? ?? r 2 r 1 ----- - ?? ?? v ref + = v ref r 2 v dd mcp6h91
mcp6h91/2/4 ds25138b-page 20 ? 2012 microchip technology inc. 4.7.2 active full-wave rectifier the mcp6h91/2/4 family of amplifiers can be used in applications such as an active full-wave rectifier, as shown in figure 4-9 . the amplifier and feedback loops in this active voltage rectifier circuit eliminate the diode drop problem that exists in a passive voltage rectifier. this circuit behaves as a voltage follower (the output follows the input) as long as the input signal is more positive than the reference voltage. if the input signal is more negative than the reference voltage, however, the circuit behaves as an inverting amplifier with a gain = -1v/v. therefore, the output voltage will always be above the reference voltage, regardless of the input signal. the reference voltage (v ref ) is supplied by a low-impedance source. in single-supply applications, v ref is typically v dd /2. figure 4-9: active full-wave rectifier. 4.7.3 lossy non-inverting integrator the non-inverting integrator shown in figure 4-10 is easy to build. it saves one op amp over the typical miller integrator plus inverting amplifier configuration. the phase accuracy of this integrator depends on the matching of the input and feedback resistor-capacitor time constants. r f makes this a lossy integrator (it has finite gain at dc), and makes this integrator stable by itself. to ensure proper operation, the op amp common mode input voltage must be kept within the allowed range. figure 4-10: non-inverting integrator. ? + ? + v in v out v ref v ref r r r r/2 r op amp a op amp b d 1 d 2 v ref v ref time time input output 1/2 mcp6h92 1/2 mcp6h92 + _ c 1 c 2 r 1 r 2 v in v out r f v out v in ------------- 1 sr 1 c 1 ?? -------------------- f 1 2 ? r 1 c 1 1 r f r 2 ------ + ?? ?? ------------------------------------------ - ? ? ? mcp6h91 r f r 2 ? r 1 c 1 r 2 ||r f ?? c 2 = c 2
? 2012 microchip technology inc. ds25138b-page 21 mcp6h91/2/4 5.0 design aids microchip technology inc. provides the basic design tools needed for the mcp6h91/2/4 family of op amps. 5.1 spice macro model the latest spice macro model for the mcp6h91/2/4 op amp is available on the microchip web site at www.microchip.com . the model was written and tested in pspice, owned by orcad (cadence ? ). for other simulators, translation may be required. the model covers a wide aspect of the op amp?s electrical specifications. not only does the model cover voltage, current and resistance of the op amp, but it also covers the temperature and noise effects on the behavior of the op amp. the model has not been verified outside the specification range listed in the op amp data sheet. the model behaviors under these conditions cannot be guaranteed to match the actual op amp performance. moreover, the model is intended to be an initial design tool. bench testing is a very important part of any design and cannot be replaced with simulations. also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves. 5.2 filterlab ? software microchip?s filterlab ? software is an innovative software tool that simplifies analog active filter (using op amps) design. available at no cost from the microchip web site at www.microchip.com/filterlab , the filterlab ? design tool provides full schematic diagrams of the filter circuit with component values. it also outputs the filter circuit in spice format, which can be used with the macro model to simulate actual filter performance. 5.3 maps (microchip advanced part selector) maps is a software tool that helps semiconductor professionals efficiently identify microchip devices that fit a particular design requirement. available at no cost from the microchip web site at www.microchip.com/ maps , maps is an overall selection tool for microchip?s product portfolio that includes analog, memory, mcus and dscs. using this tool, you can define a filter to sort features for a parametric search of devices and export side-by-side technical comparison reports. helpful links are also provided for data sheets, purchases and sampling of microchip parts. 5.4 analog demonstration and evaluation boards microchip offers a broad spectrum of analog demonstration and evaluation boards that are designed to help you achieve faster time to market. for a com- plete listing of these boards and their corresponding user?s guides and technical information, visit the microchip web site: www.microchip.com/analogtools . some boards that are especially useful include: ? mcp6xxx amplifier evaluation board 1 ? mcp6xxx amplifier evaluation board 2 ? mcp6xxx amplifier evaluation board 3 ? mcp6xxx amplifier evaluation board 4 ? active filter demo board kit ? 5/6-pin sot-23 evaluation board, part number vsupev2 ? 8-pin soic/msop/tssop/ dip evaluation board, part number soic8ev 5.5 application notes the following microchip analog design note and appli- cation notes are available on the microchip web site at www.microchip.com/appnotes , and are recommended as supplemental reference resources. ? adn003: ?select the right operational amplifier for your filtering circuits?, ds21821 ? an722: ?operational amplifier topologies and dc specifications?, ds00722 ? an723: ?operational amplifier ac specifications and applications?, ds00723 ? an884: ?driving capacitive loads with op amps?, ds00884 ? an990: ?analog sensor conditioning circuits ? an overview?, ds00990 ? an1177: ?op amp precision design: dc errors?, ds01177 ? an1228: ?op amp precision design: random noise?, ds01228 ? an1297: ?microchip?s op amp spice macro models?? ds01297 ? an1332: ?current sensing circuit concepts and fundamentals?? ds01332 these application notes and others are listed in: ? ?signal chain design guide?, ds21825
mcp6h91/2/4 ds25138b-page 22 ? 2012 microchip technology inc. notes:
? 2012 microchip technology inc. ds25138b-page 23 mcp6h91/2/4 6.0 packaging information 6.1 package marking information 8-lead soic (150 mil.) (mcp6h91, mcp6h92) example: legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e example: 8-lead 2x3 tdfn (mcp6h91, mcp6h92) mcp6h91 e sn ^^1223 256 3 e abg 123 25 part number code mcp6h91t-e/mny abg mcp6h92t-e/mny abh 14-lead soic (150 mil) ( mcp6h94 ) example: yyww nnn xxxxxxxx 14-lead tssop ( mcp6h94 ) example: mcp6h94 e/sl 1223256 6h94 e/st 1223 256
mcp6h91/2/4 ds25138b-page 24 ? 2012 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2012 microchip technology inc. ds25138b-page 25 mcp6h91/2/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
mcp6h91/2/4 ds25138b-page 26 ? 2012 microchip technology inc.
? 2012 microchip technology inc. ds25138b-page 27 mcp6h91/2/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
mcp6h91/2/4 ds25138b-page 28 ? 2012 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2012 microchip technology inc. ds25138b-page 29 mcp6h91/2/4
mcp6h91/2/4 ds25138b-page 30 ? 2012 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2012 microchip technology inc. ds25138b-page 31 mcp6h91/2/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
mcp6h91/2/4 ds25138b-page 32 ? 2012 microchip technology inc.
? 2012 microchip technology inc. ds25138b-page 33 mcp6h91/2/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
mcp6h91/2/4 ds25138b-page 34 ? 2012 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2012 microchip technology inc. ds25138b-page 35 mcp6h91/2/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
mcp6h91/2/4 ds25138b-page 36 ? 2012 microchip technology inc. notes:
? 2012 microchip technology inc. ds25138b-page 37 mcp6h91/2/4 appendix a: revision history revision b (december 2012) the following is the list of modifications: ? updated the v dd ? v ss value in the absolute maximum ratings ? section. revision a (june 2012) ? original release of this document.
mcp6h91/2/4 ds25138b-page 38 ? 2012 microchip technology inc. notes:
? 2012 microchip technology inc. ds25138b-page 39 mcp6h91/2/4 product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . device: mcp6h91: single op amp mcp6h91t: single op amp (tape and reel) (soic and 2x3 tdfn) mcp6h92: dual op amp mcp6h92t: dual op amp (tape and reel) (soic and 2x3 tdfn) mcp6h94: quad op amp mcp6h94t: quad op amp (tape and reel) (soic and tssop) temperature range: e = -40c to +125c (extended) package: mny * = plastic dual flat, no lead, (2x3 tdfn) 8-lead (tdfn) sn = lead plastic small outline (150 mil body), 8-lead (soic) sl = plastic small outline, (150 mil body), 14-lead (soic) st = plastic thin shrink small outline (150 mil body), 14-lead (tssop) * y = nickel palladium gold manufacturing designator. only available on the tdfn package. part no. /xx package temperature range device examples: a) mcp6h91-e/sn: 8ld soic pkg., extended temp. b) mcp6h91t-e/sn: tape and reel, extended temp., 8ld soic pkg. c) mcp6h91t-e/mny: tape and reel, extended temp., 8ld 2x3 tdfn pkg. d) mcp6h92-e/sn: extended temp, 8ld soic pkg. e) mcp6h92t-e/sn: tape and reel, extended temp., 8ld soic pkg. f) mcp6h92t-e/mny: tape and reel, extended temp., 8ld 2x3 tdfn pkg. g) mcp6h94-e/sl: extended temp., 14ld soic pkg. h) mcp6h94t-e/sl: tape and reel, extended temp., 14ld soic pkg. i) mcp6h94-e/st: extended temp., 14ld tssop pkg. j) mcp6h94t-e/st: tape and reel, extended temp., 14ld tssop pkg. -x
mcp6h91/2/4 ds25138b-page 40 ? 2012 microchip technology inc. notes:
? 2012 microchip technology inc. ds25138b-page 41 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, flashflex, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic, sst, sst logo, superflash and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mtp, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. analog-for-the-digital age, app lication maestro, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mpf, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, sqi, serial quad i/o, total endurance, tsharc, uniwindriver, wiperlock, zena and z-scale are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. gestic and ulpp are registered trademarks of microchip technology germany ii gmbh & co. & kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2012, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: 978-1-62076-758-0 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem certified by dnv == iso/ts 16949 ==
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